The mounting technology of a semiconductor chip such as a chip on glass (hereinafter referred to as “COG”), a chip on film (hereinafter referred to as “COF”), and a chip on chip (hereinafter referred to as “COC”) uses a gold (Au) bump or a solder bump. In the mounting using a COG or a COF, a plurality of lead terminals formed on a substrate and a plurality of chip terminals formed on a semiconductor integrated circuit are connected via bumps respectively. A plurality of positioning marks is provided on such a semiconductor integrated circuit generally in order to mount the semiconductor integrated circuit exactly on a predetermined position of a substrate. Japanese Patent Application Publication (Kokai) No. 2004-258131 discloses a liquid crystal display device, as a semiconductor device using a COG.
A plurality of terminals to measure bump connection resistance is provided on a drive IC chip shown in the patent publication. The terminals are used to decide whether bump connection resistances between lead terminals formed on a substrate and chip terminals formed on the drive IC chip is lower than a predetermined value or not.
External terminals, which are connected to the terminals to measure bump connection resistance, are provided on a liquid crystal panel side. It becomes difficult to ensure a space to arrange a plurality of measurement terminals to measure the bump connection resistance on a semiconductor chip such as a drive IC chip, with recent progress of reduction and high performance of the semiconductor chip.